Technical and Economical Challenges for Electronic Packaging Engineers
Moises Cases, The Cases Group (US)
System's operating frequency is increasing rapidly as the result of semiconductor technology development and primarily due to device feature scaling and photo-lithographic equipment improvements. As processing speed increases, the physical structures connecting the system components become critical for system functionality and timing. Signal propagation on interconnects becomes critical as the result of signal and power integrity issues, system-level modeling and simulation capability and the strong dependency on multi-physics effects.
Two of greatest impediments in improving speed and cost of connectivity in Copper based interconnects is the skin depth at low frequencies and dielectric losses at high frequencies. Copper surface roughness and via stub resonance effects are becoming more important for interconnects operating beyond 10 Gbps. In addition, at high frequencies the variation in loss for the same material from one material vendor to another and one fabrication house to another is becoming a challenge. Several emerging signal interconnect technologies, such as coplanar waveguide (CPW) and micro and membrane transmission line structures, can be the basic building blocks of a new high speed ecosystem and provide significant speed and bandwidth improvements on any material used in the development of electronics devices at the wafer, device, package, PCB, and system levels.
The presentation covers today's technology trends and roadmaps as they relate to electronic packaging integration. The technical and economical challenges are presented and discussed and several pertinent emerging technologies are discussed, such as 3D packaging and new signal interconnects structures including but not limited to coplanar waveguides on silicon, embedded optical waveguides and carbon nanotubes. Finally, an innovation model is presented to allow for affordable, open, multi-disciplinary and global collaboration that enables growth opportunities and accelerates commercialization of novel structures and systems.
Moises Cases has over 39 years of progressive experience in very-large scale integration (VLSI) chip and package designs, in system level electrical and package designs, and in complex project and people management. He retired as a Distinguished Engineer and Master Inventor from the IBM Corporation, System and Technology Group in 2009. Mr. Cases was the team leader for system electrical design and integration of modular and blade servers, responsible for signal and power distribution integrity, and system level timings for complex multiple board system designs. Presently, Mr. Cases is the President and CEO of The Cases Group, LLC; a Texas Limited Liability Company dedicated to design and consulting services for electronic systems. He obtained his Master of Science in Computer Engineering from Syracuse University, NY in 1979, Master of Science in Electronic Engineering from New York University, NY in 1973, and a Bachelor of Science in Electrical Engineering from City College of New York, NY in 1969. He is a Fellow member of IEEE society and a member of Tau Beta Pi and Eta Kappa Nu honor societies.
Mr. Cases was awarded IEEE Fellow grade in 2008 for contributions to design and noise control for power and signal distribution in digital systems. He was the general co-chairman (representing the industry) of the IEEE Electrical Performance of Electronic Packaging (EPEP) workshop for 2005 through 2006, and he was the general chairman of the 1999 IEEE Systems Packaging Workshop. Moises is also an Associate Editor for IEEE CPMT Transactions on Advanced Packaging since 2002. He chaired the electromechanical working group (EWG) for the Infiniband Trade Association (IBTA) from 2003 to 2008.
Mr. Cases has received the Hispanic in Technology Corporate Award from the Society of Hispanic Professional Engineers (SHPE) in 2006, the Business/Community Representative of the Year Award from Austin Independent School District (AISD) in 2007, the Albert V. Baez Award from HENAAC in 2007, the Teacher-Engineer Partnership Award from IEEE in 2008, and the Outstanding Sustained Technical Contribution Award from IEEE and CPMT societies in 2009. He was elected to the IBM Academy of Technology in 2008 and he is presently a member emeritus of the Academy.
Mr. Cases has 78 patents filed, 54 publications in IBM technical disclosure bulletins and 95 refereed publications in various professional manuscripts and conferences. These patents and publications encompass numerous technical areas and fields of studies in integrated circuits and systems; interconnect technologies, interconnect design methodology and tools; digital system designs and I/O architecture; integrated programmable logic arrays and charge coupled devices; and service science management and engineering.
Multiphysics Solutions for Silicon-Based High Density Interconnects and Miniaturized Devices with High Performance
Wen-Yan Yin, Zhejiang University, Hangzhou, China
ABSTRACT - Multiphysics modeling techniques for silicon-based high density interconnects and miniaturized devices will be presented in this tutorial, which are very important in the development of integrated 3-DICs with high functionality and high performance. It mainly consists of (1) electrothermal and electrothermo- mechanical modeling of various silicon-based interconnects, such as through silicon via (TSV?arrays, etc.; and (2) electrothermal modeling of various single- and multi-spiral stacked inductive devices used for both RFIC and MMIC. The partial element equivalent circuit (PEEC) and hybrid time-domain finite element methods (TD-FEM) are successfully implemented for handling these challenging multiphysics problems, with frequency-, temperature- and stress-dependent material parameters involved treated appropriately
Wen-Yan Yin is the "Qiu Shi" Chair Professor of Zhejiang University (ZJU), working at the Centre for Optical and Electromagnetic Research, National State Key Lab of MOI, ZJU of China. He is also the adjunct Professor of CMRFT, Shanghai Jiao Tong University, Shanghai of China now.
His main research interests are in the development of modeling techniques for passive and active RF and millimeter wave device and circuits, nanoelectronics, electromagnetic compatibility (EMC) and electromagnetic protection (EMP) of communication platforms, computational multiphysics methods and its applications.
He is a reviewer of lots of international journals, including eight IEEE Transactions and Letters, and Radio Science, etc. He is listed in the editorial board members of JEMWA, Progress in Electromagnetics Research (PIER), and International Journal of RF and Microwave CAE. As a leading author, he has published more than 180 international journal articles (including one international book, 15 book chapters and more than sixty IEEE Papers). One chapter of "Complex Media" is included in the Encyclopedia of RF and Microwave Engineering, published in 2005 by John Wiley & Sons, Inc.
Dr. Yin is the IEEE EMC Society Distinguished Lecturer from 2011 to 2012, General Co-Chair of 2011 IEEE Electrical Design of Advanced Packaging and System Symposium (IEEE EDAPS2011), technically sponsored by IEEE CPMT Society. He was also the Technical Chair of Electrical Design of Advanced Packaging and Systems-2006 (EDAPS'06). He received the Science and Technology Promotion Award of the first class from the local Shanghai government of China in 2005, the Technology Invention Award of the first class from the Educational Ministry of China in 2007, the National Technology Invention Award of the second class from Chinese government in 2008, and the Best Paper Award of 2008 Asia-Pacific Symp. Electromagnetic Compatibility & 19th International Zurich Symp. in Singapore.